Skip to content
GitLab
Explore
Sign in
Primary navigation
Search or go to…
Project
JPSvis
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Container registry
Model registry
Operate
Environments
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
JuPedSim
JPSvis
Commits
c20f71ed
Verified
Commit
c20f71ed
authored
6 years ago
by
Mohcine Chraibi
Browse files
Options
Downloads
Patches
Plain Diff
add full path to aux files
parent
ed3c4eff
Branches
Branches containing commit
Tags
Tags containing commit
No related merge requests found
Pipeline
#19414
passed
6 years ago
Stage: configure
Stage: compile
Changes
3
Pipelines
1
Show whitespace changes
Inline
Side-by-side
Showing
3 changed files
src/MainWindow.cpp
+2
-2
2 additions, 2 deletions
src/MainWindow.cpp
src/SaxParser.cpp
+2
-0
2 additions, 0 deletions
src/SaxParser.cpp
src/geometry/Building.cpp
+4
-2
4 additions, 2 deletions
src/geometry/Building.cpp
with
8 additions
and
4 deletions
Loading
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment
